In an insulated-type power semiconductor module used for a power conversion device such as an inverter, a wiring pattern is formed on a metal plate serving as a heat-radiation plate with an insulating layer interposed therebetween. On this wiring pattern, a power semiconductor element configured to perform a switching operation is provided. This power semiconductor element is connected to an external terminal and sealed with resin.
In the power conversion device performing a switching operation at a large current and a high voltage, a surge voltage (ΔV=L·di/dt) determined by a rate of change of current with time di/dt when the power semiconductor element is turned off and a parasitic inductance L included in the power conversion device is generated, and this surge voltage is applied to the power semiconductor element. As parasitic inductance L increases, a surge voltage exceeding the breakdown voltage of the power semiconductor element is generated, which may lead to breakage of the power semiconductor element. Accordingly, the power conversion device needs to be reduced in inductance and the power semiconductor module also needs to be reduced in inductance.
A required current capacity of the power conversion device has been satisfied by selecting a power semiconductor module which meets the required current capacity, or using a plurality of power semiconductor modules connected in parallel if such a power semiconductor module is unavailable. However, if a plurality of power semiconductor modules connected in parallel are used, it is necessary to separate the modules from each other for keeping an insulation distance between the modules, which results in a disadvantage of increase of the footprint.
This disadvantage may be solved by arranging power semiconductor elements in a multi-parallel array within the same package (see PTD 1 for example). Even if a plurality of external terminals are provided for connection with an external circuit as disclosed in PTD 1, the effect of reducing the inductance is not sufficient in the case where respective terminals of the plurality of power semiconductor elements arranged in the multi-parallel array in the same package are connected together, in the same package, to the external terminal. In this case, an increase of the current capacity is accompanied by an increase of di/di at the time of turn off and accordingly an increase of the surge voltage, possibly resulting in breakage of the power semiconductor elements.
In view of the above, inventors have invented a power semiconductor module having a plurality of external terminals and a plurality of circuits arranged in parallel in the power semiconductor module, aiming at reduction of the inductance of the power semiconductor element (see PTD 2 for example).